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Philips Semiconductors
PCF8598C-2
1024 × 8-bit CMOS EEPROM with I 2 C-bus interface
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
S
SLAVE ADDRESS
0 A
WORD ADDRESS
A
DATA
A
DATA
A
P
R/W
auto increment
word address
auto increment
word address
MBA701
Fig 5. Auto-increment memory word address; two byte write.
Page write: The PCF8598C-2 is capable of an eight-byte page write operation. It is
initiated in the same manner as the byte write operation. The master can transit eight
data bytes within one transmission. After receipt of each byte, the PCF8598C-2 will
respond with an acknowledge. The typical E/W time in this mode is
9 × 3.5 ms = 31.5 ms. Erasing a block of 8 bytes in page mode takes typical 3.5 ms
and sequential writing of these 8 bytes another typical 28 ms.
After the receipt of each data byte, the three low-order bits of the word address are
internally incremented. The high-order ?ve bits of the address remain unchanged.
The slave acknowledges the reception of each data byte with an ACK. The I 2 C-bus
data transfer is terminated by the master after the 8th byte with a STOP condition. If
the master transmits more than eight bytes prior to generating the STOP condition,
no acknowledge will be given on the ninth (and following) data bytes and the whole
transmission will be ignored and no programming will be done. As in the byte write
operation, all inputs are disabled until completion of the internal write cycles.
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
S
SLAVE ADDRESS
0 A
WORD ADDRESS
A
DATA N
A
DATA N + 1
A
R/W
auto increment
word address
auto increment
word address
acknowledge
from slave
DATA N + 7
last byte
A
A
Fig 6. Page write operation; eight bytes.
9397 750 14219
002aaa245
auto increment
word address
? Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 06 — 22 October 2004
8 of 21
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